1. Field of the Invention
The present invention relates to a circuitry and a clock control method preferable for a semiconductor device having serial transmission/reception means (USB control circuit) for downloading or uploading data at a certain transmit-receive frequency from a personal computer (PC) such as a digital audio and an interface (IF) circuit for performing serial transmission/reception of data, which has been processed in a digital signal processing circuit (DSP circuit) performing a data decompression process or the like, at a certain transmit-receive frequency.
2. Related Background Art
In recent years, demand for digital audio players or other portable devices as peripherals is bulging. This type of peripheral serves as a micro controller unit (MCU) to be a main control unit, a flash memory controller for writing or reading audio data stored in an external memory, a DSP circuit for decoding or decrypting the data read from the external memory, an interface circuit (SAI circuit: Serial audio interface) outputting the data processed in the DSP circuit as audio signals to an ADC/DAC system, and a USB controller connected to a PC for downloading or uploading data to an external memory such as a flash memory.
This type of peripheral performs reproduction of music data, copyright protection, downloading, and displaying. The DSP circuit performs data decoding, data outputting, and an equalizer/volume control in the reproduction of music data.
The peripheral is portable and therefore driven by a battery. Accordingly, the peripheral facilities need be contained in a single chip to reduce a battery drain so as to hold down the power consumption.
The multifunction and the high-speed operating frequency of the DSP circuit mentioned above, however, are indispensable for achieving a high performance of a digital audio player. Accordingly, an increase in a gate size due to the provision of the multifunction and an increase in speed of the operating frequency boost consumed current.
A clock generator circuit for audio clock signals for outputting the data decoded in the DSP circuit to the DAC system outside the chip has frequencies determined exclusively for the clock generator circuit so as to adapt to MPEG1, LAYER3, MPEG2, LAYER3, and MPEG2.5. Since the USB circuit performs 12-MHz serial communication, its internal control circuit requires 48-MHz fixed clock signals. Therefore, at least two clock systems are required and it leads to an increase in current consumed by a PLL or an oscillator circuit (OSC).
Therefore, further reduction of power consumption is required as the whole peripheral device (the entire digital audio player). Particularly during music data reproduction with the DSP circuit, a battery drain is drastic since the DSP circuit operates at an extremely high frequency. Therefore, there has been a demand for a semiconductor device improved in the power consumption.